1. Technical Field
The present disclosure relates to a method of manufacturing a non-volatile memory device. More particularly, the present disclosure relates to a method of manufacturing a non-volatile memory device including a floating gate electrode.
2. Description of the Related Art
Semiconductor memory devices, in general, are typically classified as either volatile or non-volatile semiconductor memory devices. Volatile semiconductor memory devices such as dynamic random access memory (DRAM) devices and/or static random access memory (SRAM) devices have a relatively high response speed. However, the volatile semiconductor memory devices may lose data stored therein when power is shut off. On the other hand, although non-volatile semiconductor memory devices such as electrically erasable programmable read only memory (EEPROM) devices and/or flash memory devices have a relatively slow response speed, non-volatile semiconductor memory devices are able to maintain data stored therein even when power is shut off.
In EEPROM devices, data may be electrically stored (e.g., programmed) or erased through a Fowler-Nordheim (F-N) tunneling mechanism and/or a channel hot electron injection mechanism. The flash memory device may be classified as either a floating gate type or a charge trap type such as silicon-oxide-nitride-oxide-semiconductor (SONOS) type devices and/or metal-oxide-nitride-oxide-semiconductor (MONOS) type devices.
The float gate type non-volatile memory device may comprise a tunnel insulating layer, a float gate electrode, a blocking layer and a control gate electrode. For example, a multi-layered dielectric layer including a lower silicon oxide layer, a silicon nitride layer and an upper silicon oxide layer may be used as the blocking layer.
Recently, a method of forming the blocking layer out of a high-k material has been developed to increase the capacitance of the blocking layer and to improve the leakage current characteristic. For example, a method of forming the blocking layer out of metal oxide such as, for example, hafnium oxide, zirconium oxide, aluminum oxide, hafnium aluminum oxide, having a dielectric constant higher than that of silicon nitride has been employed.
However, when a hafnium aluminum oxide layer is used as the blocking layer, though the leakage current characteristic may be improved, the reliability of the non-volatile memory device may be deteriorated due to shallow trap sites in the hafnium aluminum oxide layer. In detail, electrons may be trapped in the shallow trap sites in the hafnium aluminum oxide layer from the control gate electrode and/or the float gate electrode, and thus the high temperature stress (HTS) characteristic and threshold voltage window characteristic in the non-volatile memory device may be deteriorated.
Further, a blocking layer including a lower aluminum oxide layer, a middle hafnium oxide layer and an upper aluminum oxide layer typically has a break down voltage less than about 15 MV/cm. Thus, when the blocking layer including the lower aluminum oxide layer, the middle hafnium oxide layer and the upper aluminum oxide layer is employed in a non-volatile memory device, the break down voltage characteristics of the non-volatile memory device may be deteriorated.